1. Field of the Invention
This invention relates to a controlling chip, and more particularly, to an apparatus mounted on a computer mainboard that is able to adjust the impedance for a better impedance matching.
2. Description of Related Art
FIG. 1 shows the linkage between a controlling chip and memory sockets in a conventional SSTL DRAM bus. The read/write port 130 in the controlling chip 100 connects to a plurality of memory sockets 101 through transmission line, wherein the transmission line includes address line, data line, and other controlling line. Because currently the signals are transmitted in a relatively high frequency, problems caused by signal reflection and impedance matching accompanying with high frequency signals have to be seriously concerned. Since good impedance matching is the primary condition for minimizing signal reflection, so a design of resistors in series is normally added into the circuit designs for improving impedance matching. Referring to FIG. 1, the read/write port 130 is in series with serial resistor R.sub.S through transmission line 120, wherein the serial resistor R.sub.S can be used as a impedance matching between the read/write port 130 and memory sockets 101a.about.101d (101a, 101b, 101c, 101d) for reducing reflection in order to prevent signals from distortion. In the other hand, the pull-up resistor R.sub.T is connected to the pull-up voltage source 108a and then connected to the serial resistor R.sub.S through transmission line 140. The voltage delivered by the pull-up voltage source 108a is divided by the pull-up resistor R.sub.T for providing a DC voltage level to clamp signals on the level. Another pull-up resistor R.sub.T connected to pull-up voltage source 108b has a similar function.
As referring to FIG. 1, the serial resistor R.sub.S is also connected to memory sockets 101a.about.101d as impedance matching between the controlling chip and memory sockets. However, memory sockets 101a.about.101d may not all be used at the same time in a real world application, in this case, the precision of the impedance matching is affected because the serial resistor R.sub.S cannot be adjusted under the circumstance that different combinations of the usage on the memory sockets. Hence, the value of the serial resistor R.sub.S has to be adjusted according to the actual usage of the memory sockets for keeping the impedance matching precise. In addition, the resistance of the pull-up resistor R.sub.T has to be adjusted according to different usage combination of the memory sockets 101a.about.101d to prevent the voltage level from shifting. However, since the serial resistor R.sub.S and the pull-up resistor R.sub.T are both fixed resistors whose resistance cannot be adjusted according to the real usage of the memory sockets in a conventional design, the problems caused by impedance matching cannot be efficiently resolved, in addition, the voltage level provided through the pull-up resistor R.sub.T is not precise as well, as a result, the entire performance is seriously worsened.
Because the serial resistor R.sub.S is located outside the controlling chip 100, it has to go through transmission line 120 to connect to the read/write port 130. In order to get a better impedance matching, the serial resistor R.sub.S has to get closer to the controlling chip 100 as possible, that is, the length of the transmission line 120 has to be shorter as possible. However, the currently used packaging technique, such as Tin ball grid array structure, has become the mainstream in this field which is characterized by its massive and compact legs. The controlling chip 100 is surrounded by a massive number of lines that make it more difficult to have the serial resistor R.sub.S close to the controlling chip 100. As a result, the serial resistor R.sub.S and the controlling chip 100 is always separated by a distance of about 1500.about.2000 mils (1 mil=10.sup.-3 inch), which affects the precision of the impedance matching.
According to the foregoing, the conventional design brings up at least the following drawbacks:
1. The resistance on the serial resistor cannot be adjusted according to the actual usage of the memory sockets that worsens the impedance and leads to that the precision of signals is worsened; PA1 2. The resistance of the pull-up resistor cannot be adjusted according to the actual usage of the memory sockets that causes the shifting on the voltage level and leads to that the precision of signals is worsened; and PA1 3. Both serial resistors and pull-up resistors are located outside the controlling chip and not close enough to the controlling chip that make the improvement on the signal quality limited.